This invention generally relates to microprocessors and more specifically is directed to a system for insuring proper microprocessor initialization following the removal and reapplication of power to the microprocessor.
When power is applied to a system incorporating a microprocessor, the microprocessor is typically energized after a suitable safe time delay allowing for system stabilization for providing various, well-defined power supply levels thereto. The microprocessor then generally enters an initialization or reset routine wherein the microprocessor program counter is set to a zero count. The microprocessor then calls out the location in its read only memory (ROM) whose address is represented by the zero count in the program counter. The contents of that memory location initiates the initialization program routine which initializes the buffer pointers and the output port latches of the microprocessor. In general, this initialization routine defines and establishes the initial conditions for microprocessor operation including a resetting of its logic to an initialized condition from which subsequent operation may proceed.
To accomplish this initialization process, generally two signals are provided to the microprocessor. One input is from a power supply which provides the voltage level necessary for proper logic circuitry operation. Another input, generally termed the power on reset signal, initiates the initialization routine previously described. These two inputs are generally provided by the same signal source, e.g., a DC power supply. The sequence in which these two inputs are provided to the microprocessor is important in that if the power on reset signal is removed, or goes high, after the input supply voltage drops to a specified voltage which is established by the particular microprocessor involved, microprocessor initialization will be precluded and proper microprocessor operation will not be possible. Typically, when the power on reset line is low, i.e., POR occurs, the power on reset signal is applied to the microprocessor and when this signal is high, i.e., POR occurs, normal operation is possible.
In a microprocessor application where a high frequency power supply is utilized the aforementioned input signal sequence problem is less likely to occur since short time delays may be introduced in the power on reset signal path for delaying its application to the microprocessor. RC time constants of predetermined duration are generally introduced in the microprocessor input circuitry for delaying the release of the power on reset signal. A diode is generally coupled to the power on reset signal input circuit to provide for its rapid decay following removal of power from the microprocessor. This provision is incorporated to accommodate short duration power outages or rapid ON/OFF cycling of the microprocessor which can result in the power on reset signal leading the input supply voltage applied to the microprocessor. However, because of the voltage drop across this diode required to render it conducting, the power on reset signal tends to remain high inhibiting microprocessor reinitialization following a short power outage or rapid ON/OFF cycling of the microprocessor.
Frequently, as in the case of many television receivers, a high frequency scan-derived power supply may not be utilized. To use a scan-derived power supply, the power supply's impedance must be reduced in order to match that of the horizontal drive transistor in the horizontal sweep circuit. If the power supply lead to the television receiver's tuning system should become dislodged, the load on the horizontal sweep circuit will be substantially reduced resulting in an unsafe combination of cathode ray tube (CRT) high voltage and electron beam current. The relationship between CRT voltage and beam current intensity for a particular CRT is generally provided in the form of an "Isodose" curve. Safety standards dictate that this Isodose curve not be exceeded for the operation of a given CRT, for if exceeded, excessive X-radiation levels will emanate from the CRT.
The aforementioned approach for controlling the power on reset input to a microprocessor with respect to the power supply voltage applied thereto is shown in FIG. 1. The power supply voltage, V.sub.CC, is provided to a power supply terminal 12 and a power on reset terminal 16 in microprocessor 14. The microprocessor, in response to user initiated inputs from a control device such as a keyboard 64, executes various operations and, in turn, provides appropriate control signals to the controlled device such as the tuner 24 of a television receiver. A grounded capacitor 18 and resistor 20 combination provides a predetermined time constant to the application of the power on reset signal to the microprocessor 14 incorporating a delay therein so as to permit the power supply voltage, V.sub.CC, to be applied to the microprocessor first. A diode 22 is coupled across the resistor and capacitor network so as to permit the power on reset input to drop off to zero more rapidly than V.sub.CC, when power is removed from the microprocessor. This insures that V.sub.CC will be of sufficient magnitude to energize the microprocessor before application of the power on reset signal to the microprocessor whenever power is lost for only a short period or when the microprocessor is turned OFF and immediately thereafter turned ON.
A conventional approach to controlling the application of the power supply voltage and the power on reset signal to a microprocessor in a television receiver involves the detection of the input supply voltage applied to a voltage regulator. When the output of the power supply reduces to the level where the voltage regulator is no longer able to regulate the power supply voltage, detection circuitry coupled to the power on reset line holds this signal low until the power supply output increases and the voltage regulator once again controls this voltage which energizes the microprocessor. This approach generally utilizes a series regulator for regulating the DC supply output voltage resulting in a considerable variation in the load being imposed upon the power supply which is particularly undesirable where multi-segment light emitting diode (LED) channel number displays are utilized which also impose considerable and widely varying power requirements on the power supply.
The present invention is intended to overcome the aforementioned limitations by providing a microprocessor with a power on reset control arrangement utilizing a shunt voltage regulator coupled to the power supply in a feedback circuit for controlling the application of the power on reset signal with respect to the input supply voltage provided to the microprocessor.